Browsing by Author "S. A. Rahman"
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Publication Advancing Ohl Rating Calculations: Modeling Mixed-convective Cooling And Conductor Geometry(IEEE, 2022) ;K. Kopsidas ;S. A. Rahman ;M. A. AlAqilStefano RolfoThe existing standard current-temperature calculations for overhead line (OHL) conductors have been adequate for conventional conductors and their operating temperatures. However, these calculations make assumptions and include simplifications about conductor geometry and aero-thermal-dynamics, introducing an error in the High-Temperature Low-Sag conductors operating temperatures. To quantify the error introduced by the shape of strands, the paper employs a Multi-Physics Finite Element Modeling approach that calculates the conjugate heat transfer for trapezoidal stranded OHL conductors. Furthermore, it proposes corrective equations to improve the accuracy of existing methods. The equations incorporate a new Nusselt number correlation for mixed convection and capture the surface area ignored by current calculations. The outer conductor geometry assumptions and the combined natural and forced convective cooling omission in the IEEE and CIGRE methods introduce an error at low (below 0.12 m/s) cross-flow wind speeds suggesting an underestimation of conductor temperature by up to 4%. In medium wind speeds, typically at 0.5 m/s–0.61 m/s, the standard methods overestimate the conductor temperature limiting its current-carrying capability. A 5% uprating for existing OHLs is potentially feasible, particularly for the trapezoidal stranded conductors, when removing the assumptions made in existing methods.9 - Some of the metrics are blocked by yourconsent settings
Publication I-V Characteristics of GaAs/AlAs Asymmetric Spacer Layer Tunnel Diode (ASPAT) Using Statistical Validation(Penerbit UTHM, 2025) ;E. Jamil ;N. A. AzizulRahman ;M. Othman ;S. A. Rahman; K. N. Z. AriffinThe Asymmetric Spacer Layer Tunnel Diode (ASPAT) has been physically fabricated and simulated using (2) Silvaco Atlas, a widely used semiconductor device simulation software. The ASPAT features an asymmetrical structure, leading to asymmetric current-voltage (I-V) characteristics, making it suitable as a zero-bias detector with low power consumption for high-frequency applications. Accurately validating these characteristics is critical to assessing the device’s performance. However, existing numerical models rely on the Poisson, Schrödinger, and Tsu-Esaki equations, which only account for tunnelling behaviour in discrete regions emitter, barrier, and collector without fully incorporating the effects of doping concentration, material composition, and interface defects. The Transfer Matrix Method (TMM), while addressing some limitations, assumes perfect interfaces, which may not always be the case in three-dimensional (3D) fabricated devices. This study aims to investigate the numerical models used for ASPAT diode design, identify their limitations, propose an improved numerical model, and validate the proposed model against existing methods. The fabrication process of the ASPAT diode involves molecular beam epitaxy (MBE) for the Gallium Arsenide/Aluminum Arsenide (GaAs/AlAs) structure, followed by metal contact deposition, with detailed consideration of doping concentrations and potential material mismatches at the interfaces. Statistical validation of experimental and simulated I-V characteristics is conducted using linear regression, non-linear regression, and hypothesis testing of slope and intercept coefficients. (1) To ensure accuracy, a 5% significance level is assumed for validation. Results indicate that the experimental and simulation data align within a justified 5% error margin, confirming ≥ 95% validation accuracy to confirm the perfect validation despite of several limitations in physical simulation. However, the impact of 3D structural effects, boundary defects, and thermal influences must be further examined to enhance ASPAT performance. This study provides a refined numerical approach to improving ASPAT diode characterization for optimized design and performance evaluation.